SCC WorkbenchGenerated design preview · Figures 2.1 and 2.2
Dickson · Figure 2.1
Reference placement
C1C2C3S1S2S3S4S5S6S7Vsrc+−Vout

IDEAL NO-LOAD · VERIFIED PREVIEW

Vin = 24 VDerived Vout/Vsrc = 0.333333Ideal Vout = 8.0000 V

Values generated by same ideal matrix compatibility solver as prototype, not QFA results. No load; ideal switches; steady capacitor voltages. Losses and loaded output unsupported.